The present invention relates to a wafer carrier box for containing a plurality of precision substrate plates such as semiconductor silicon wafers, hard magnetic disks, fused silica glass plates for photomasks and the like with a purpose of storage and transportation.
The above mentioned precision substrate plates in electronic industries including, typically, semiconductor silicon wafers are generally fragile and susceptible to mechanical damage such as chipping and cracking by small shocks and vibrations encountered during transportation and must be kept absolutely free from contamination by the deposition of dust particles and the like. It is accordingly a usual practice, with a purpose to ensure safety and clean condition of the silicon wafers during storage and transportation, that wafer materials are contained in a wafer carrier box, as is illustrated in FIGS. 2A and 2B of the accompanying drawings, which consists of a wafer cassette 10, box body 20 and covering 30 each made from a plastic resin such as polypropylene by the method of injection molding.
In the above mentioned wafer carrier box, the wafer cassette 10 has a configuration of an approximately rectangular box or frame opening at the top and at the bottom and provided with sets of wafer-alignment grooves 11A each running in the vertical direction at a regular pitch on the two opposite side walls 11 (see FIG. 2C) each to receive the periphery of a wafer material P with a small play between the surface of the wafer material P and the walls of the groove 11A so as to hold a plurality of wafer materials P in alignment approximately each in an uprightly standing disposition.
The box body 20 is also in the form of an upwardly opening rectangular box consisting of a bottom wall 21 of an approximately uniform thickness and four side walls 22 surrounding the bottom wall 21. The plane formed by the periphery of the upper opening 23 is horizontal or in parallel to the bottom wall 21. A horizontally extending flange 24 is formed on and around the outer surface of the side walls 22 to receive the lower ends of the side walls 32 of the covering 30 when the covering 30 is mounted on the box body 20 to be fastened to the box body 20 by means of a clamping device (not shown in the figures). The wafer cassette 10 holding the wafer materials P is placed on the bottom wall 21 of the box body 20 and then the covering 30 is mounted over the opening 23 to ensure an air tight sealing condition with the flange 24.
The covering 30 consists of a top wall 31 and downwardly extending side walls 32 surrounding the top wall 31, and the covering 30 is engaged over the upper opening 23 of the box body 20. The top wall 31 of the covering 30 is provided on the lower surface thereof with a wafer-pressing member 39 made from an elastic material having a plurality of wafer-receiving grooves 39A each running in a direction within the plane defined by a pair of oppositely facing wafer-alignment grooves 11A on the side walls 11 of the wafer cassette 10 to receive the upper periphery of the wafer material P standing in the wafer cassette 10 keeping a small play with the walls of the wafer-receiving groove 39A.
A problem in the above described wafer carrier box of the prior art is that, as a consequence of the substantial play formed between the surfaces of the wafer material P and the walls of the wafer-alignment grooves 11A in which the wafer material P is inserted to take a vertical disposition, the wafer material P can be more or less inclined, as is shown in FIG. 2A, within the wafer cassette 10 in different directions from wafer to wafer. This random inclination of the wafer materials P in the wafer cassette 10 placed in the box body 20 sometimes causes a serious problem that, when the covering 30 is mounted over the upper opening 23 of the box body 20, as is illustrated in FIG. 2B, mismatching or improper contacting is unavoidable between the upper peripheries of the respective wafer materials P so that the respective wafer-receiving grooves 39A and the elevated ridgelines between two grooves 39A hit at the upper periphery of the wafer material P to cause mechanical damage to the wafer material P.
With an object to overcome the problems and disadvantage in the prior art wafer carrier box as described above, another wafer carrier box illustrated in FIGS. 3A and 3B has been proposed. In the wafer carrier box of this second prior art arrangement, the box body 20 has a bottom wall 21 which is not in a horizontal disposition but in an inclined disposition by an angle .theta. relative to the horizontal base surface L on which the box body 20 is standing by means of triangular fin-like props 21A having an apex angle .theta. while shorter and longer side walls 22A, 22B extend upright or perpendicularly to the base surface L to define a horizontal plane of the opening 23 with the upper peripheries of the side walls of the box body 20. The wafer-pressing member 39 provided on the lower surface of the covering 30 is also in an inclined disposition by the same angle .theta. by means of triangular props 31A so that each of the wafer-receiving grooves 39A can receive the upper periphery of the respective wafer material P. In this wafer carrier box, the wafer material P necessarily lies on the downside walls of the wafer-alignment grooves 11A so that mismatching can never be caused between the upper periphery of the wafer material P and the wafer-receiving grooves 39A in the wafer-pressing member 39 on the lower surface of the covering 30, so as to prevent the wafer materials P from eventually being damaged.
The wafer carrier box illustrated in FIGS. 3A and 3B, however, has a following problem. When a plurality of wafer materials P are mounted on the wafer cassette 10 in alignment by means of the wafer-alignment grooves 11A as is mentioned above and the covering 30 is mounted over the upper opening 23 of the box body 20 from above to be engaged at the lower ends of the side walls 32 with the flange 24 around the box body 20, the downward moving direction of the covering 30 and hence the downward moving direction of the wafer-pressing member 39 are not within the plane of the wafer materials P lying on the downside walls of the wafer-alignment grooves 11A. Thus, the upper periphery of the wafer material P is brought into contact with the wafer-receiving groove 39A first at the upside wall of the groove 39A before the covering 30 is completely engaged with the flange 24 and then is brought into contact with the bottom of the wafer-receiving groove 39A as the covering 30 is further moved downwardly to be fully engaged with the flange 24 around the box body 20. This can cause distortion or mechanical damage to the wafer material P under a pressing force in a biased direction.